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Need Help With An Analog circuit

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20 comments

  • Boss .

    Haven't got the solution, but think the issue is around T1.

    When the FET is "on" you have.

    But when the FET is "off" the LM741 non-inverting input is at VEE.

    I haven't used 741's for centuries, OK slight exaggeration, but didn't they have issues with inputs going to the supply rails which caused the output to invert and the circuit latch-up? I may have this totally wrong, but good to see you are looking for an alternative part.

     

     

     

     

     

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  • Richard Caldwell

    Hello Boss ( ͡° ͜ʖ ͡°)

     

    You do have the operation of the circuit correct. The OP-Amp is not latching or freezing up, I just can not get the out voltage (V1 OUT) correct when T1 turns on. When the T1 is off I can get the V1 OUT to the correct voltage using the trim pot and is rock steady every time T1 turns off. My problem is when T1 turns on supplying V2 to the positive input of the amp. For example, let's say V1 is at 3 volts and V2 is at 2 volts so V1 OUT should be 2 volts [ V1 OUT = (V1 - V2) * 2 ]. Here lays the problem every time T1 turns on I am getting a different voltage any ware between 1.75 to 2.5 volts. Once the T1 turns on the voltage V1 OUT remains constant just at the wrong voltage.

     

    You said you have not used 741 for centuries, so I would like to ask what OP-Amp would be the best replacement.?

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  • Brad Levy

    Before even getting to the op-amp portion of the circuit, I think I see another problem.

    It looks to me like you have the pinout wrong on IC2, the LM311D.

    From the data sheet for the LM311D:
    From your schematic:
    It appears that you have pin 1 and pin 8 swapped.
    If that is the case, it could be affecting the rest of the circuit, as well.

    As to the T1 and op amp portion of the design, I agree with Boss that it doesn't look right if sticking to normal op amp operation.

    If the design came from elsewhere and supposedly was already working there, it is possible it relies on one of the quirks of the 741 as far as behavior when inputs are out of range - in which case, switching to a newer-design op amp which lacks those quirks would require other changes to accomplish the desired function.

    As to a good choice of modern op amp, there are many to choose from. Which one is best depends on your application. Factors include supply voltage, min/max input voltage range, input resistance, input bias current, input offset voltage, output voltage range and output current, whether you need outputs that can drive (nearly) all the way to the supply rails, frequency response, stability, compensation capability, etc. It is hard to make a recommendation without knowing more about the application.

     

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  • Richard Caldwell

    (blushing bright red face) My bad you are right the schematic is wrong with pin 1 and pin 8 being swapped. When I breadboarded I wire it up properly.

     

    This is my own design, not someone else's. The supply rail (Vcc) is 12 volts and VEE is connected to GND making a single rail supply. The input voltage V1 max voltage is 10V (max frequency is 25Meg hertz sine wave), V2 max voltage is 5V ( a reference voltage), and V1 OUT  ranges from 0 to 10 volts depending on if T1 is turned on or off. I added C8 (.001uF) as a bandpass filter.

     

    All I am trying to do is the 2 following equations:::

    If (V1 >= V2) then V1 Out = (V1-V2) *2  (T1 turned on)

    If (V1 < V2) then  V1 OUT = V1 * 2 (T1 turned off)

    Maybe I need to split the op-amp section from a single op-amp to a dual op-amp design. One to do the subtraction and the other to do the multiplying function.

     

     

    How would you change the op-amp section so it looks right? 

     

     

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  • Boss .

    Sorry have been busy, but I question VEE going to ground, I may be wrong but I don't think the 741 will work with a single supply? If it does it will have trouble if the input goes near the rails.

    You say with the FET off the circuit is correct, but you cannot get V1 * 2 as the output, it should be negative with the inverting configuration.

    I'll try to look again when I have some time and more awake :)

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  • Brad Levy

    The 741 op amp is totally inadequate for a 25 MHz signal. (741 gain bandwidth is around 1MHz).

    The comparator is also likely to be totally inadequate, depending on whether V2 falls within the range between the minimums and maximums on the V1 sine wave (switching between the two math functions millions of times per second) or will normally be entirely below or entirely above the input sine waveform.

    Other questions:

    • Since you are using a single rail supply, what voltage level are you considering "ground" for the input sine wave?
    • If the output function is intended to be 2*V1, or 2*(V1-V2), and V1 is 10V peak-to-peak, that would imply the output swinging 20 volts, which "ain't going to happen" with a 12 volt supply. What is your intended output range?
    • Are you sure you've stated your intended function correctly?
      Your mathematical definition (ignoring circuit implementation) corresponds to this graph if V1 is a 3 volt peak-to-peak sine wave centered at zero and V2 is 1 volt:
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  • Richard Caldwell

    First:

    I found the chip I was looking for, it's the LM392 and change the schematic to the following. As you can see it is a single power rail (32V max).

    The sine wave is shifted so it goes from GND to 10 volts. With a 10V input sine wave V1 OUT can go all the way up to 16 volts with V2 at 2 volts  so I will increase VCC to at lest 24V. I will have to place a min V2 voltage to 2 volts so V1 OUT stays with in the power rails.

    As with the 741 op-amp the bandwidth for the 392 is the same. What would you say is the max frequency? I am thinking the max frequency would be some where around 750KHZ. Thanks for bring this up to my attention.

    Yes your graph shows the 2 functions correctly. Again the sine wave is shifted to rest on the GND rail.

     

     

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  • Brad Levy

    You've got a fundamental issue with T1 in that if V2 is 2 volts, you won't have enough Vgs swing to turn T1 on.  I'd look at using something like the ADG1419 analog switch rather than the FET.

    You've still got the output inverted from the mathematically specified function.

    You also need to take into account special considerations when operating op amps off a single supply.

    Some suggested resources:
    https://www.ti.com/lit/an/sloa030a/sloa030a.pdf
    http://www.add.ece.ufl.edu/4924/docs/TI_SingleSupply.pdf


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  • Richard Caldwell

    Thanks for the ref links. I will study them in great detail when I find some time.

     

    I have never used a analog switch before so I do not know how to use them.

     

    As for the V2 voltage. I use 2 volts as just an example, the actual range of V2 is between 1 and 6 volts. I expect the 2.5 volts will be the most used voltage.

     

    If I am ask how would you do the analog section that will do the 2 functions.

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  • Brad Levy

    Analog switches are like electronic (vs electro-mechanical) relays.
    Not being mechanical, they are much faster than relays, and the control input is much lower power than a relay coil. But like op amps, they require a power supply (or supplies), and the signals being switched usually have to be within the range of the power supply. The switching path usually has a resistance of a few ohms to a few hundred ohms, depending on the part, which is much higher than a mechanical relay's contact resistance. That makes them poor for powering loads, but usually fine for selecting signals going in to high impedance circuits like op amps or A to D converters.

    Here is a block diagram of the one I mentioned:
    Compared to a relay, it is fast (well under one microsecond switching speed).
    The control signals on this part have logic-level-compatible input thresholds ( <0.8 v = 0, > 2 v = 1), though they will accept input control voltages up to the positive supply.
    Contact resistance on this part is 2-4 ohms, depending on supply voltage, and the signal paths are break-before-make (it disconnects one switch before turning on the other). The IN signal selects between the SA and SB input, and the EN signal (available in some packages) enables the selected path when high, and disables both paths when low.

    Analog Switches usually combine FET transmission gates as the switch element, along with gate drive circuitry. They generally aren't as low impedance as a power FET. (Different parts available range from a few ohms up to 150 ohms - the ADG1419 I mentioned is 2 to 4 ohms, depending on operating voltage.) But what they lack in low impedance power switching capability, they make up for in quality of the passed signal, minimizing and/or compensating for gate capacitance to reduce charge injection (coupling from the gate signal into the signal being switched).

    I don't know enough about your application to recommend a particular design.
    For example, most applications dealing with frequencies in the hundreds of kiloherz or higher are rf circuits where, in the signal processing chain, only AC component of the signal, and stages are usually AC coupled. Is that the case here?
    Some applications need high levels of absolute accuracy (for example, industrial controls / positioning equipment). In other applications (like a guitar effects box) the V2 level might be set by a pot, and V1 coming from the guitar pickup. A guitarist may intentionally vary how loudly or softly they are strumming the guitar, but it is the relative level that is important - the guitarist isn't saying "okay, now I'm going to strum at 1.438 volt peak-peak instead of 1.397 volt peak-peak". So as long as the guitarist can dial the V2 pot level through a full  range of above the peaks of V1 (no effect) to the below the minimums of V1 (full shifting), they don't really care that the V2 voltage at the transition point is exactly 1.403 volts. But they may care that the fidelity of V1_out be very high as long as V2 is above the peaks of V1.

    The jump in the output as the V1 waveform moves through V2 is also going to generate high frequency harmonics, and with the output levels you are looking at, may need careful shielding to avoid becoming a nasty unintentional radio transmitter.

    Which also brings up the point that on analog circuits like these, you need to make sure to provide bypass capacitors on the power supply lines to the op amps and analog switches.

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  • Richard Caldwell

    Thanks for the great info 👀

     

    After studying the single power op-amp info I decided to use a split power (+15, GND, -15) rail. Along with breaking the op-amp circuit to a dual amp design. The first amp will do the 2 functions with a gain of 1. The second one will have a gain of 2. It will also turn the neg voltage output of the first amp to the required pos V1 OUT.

    What op-amp do you suggest I use?

    I am also add a full bridge rectifier to flip the neg part of V1 IN sine wave to a pos voltage.

     

    Here is a truth table of what I am trying to do. It to big to post here so here is a link:

    https://www.dropbox.com/s/y69ra693mcp0646/V1%20and%20V2%20Truth%20Table.txt?dl=0 

     

    I will tie the IN pin of the analog switch to VCC, with a 200K ohm pull up resistor, so when the compactor turns on IN will be pulled to logic 0 meaning D (V2) will connect to SA.

     

    Yes the supply rails need decoupling capacitors. I plan to use 220uF caps.  Along with V2, V IN, and V1 OUT needs band pass filter caps (.001uf ). Also when I lay out the PCB it will be at-lest 4 layers with layer 1 and 3 are GND planes, and signals on layer 2. Forming a farad cage and will aid in decoupling the signals.

     

     

     

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  • Brad Levy

    Doing the gain-of-2 using a second op-amp stage is a good plan.

    Regarding choice of op amp, there are many to choose from. Quite a few of them are low voltage, eliminating them from consideration for this application. The op amp's gain bandwidth, which (combined with your circuit topology) will determine how high a frequency your design can handle. You haven't stated what is driving V1 and V2 - whether they are low impedance or high impedance - which will affect the choice of op amp. Level of accuracy needed will also affect the choice, both in terms of offset voltage, and options like difference amps like the AD8276 which have matched precision resistors built in.

    Regarding using a bridge rectifier, that is problematic because your V1 input is not isolated - one side is system ground, and one side of the output of the bridge would also be ground. So when V1 goes negative, it gets shorted to ground.  There are absolute value circuit designs using op amps you can consider instead if you need the negative half-cycle flipped positive. Google absolute value op amp circuit for details. Be aware that circuits like those will have their own accuracy issues dependent on the op amps used.

    Driving the IN pin of the analog switch from the comparator with a pull-up works, but the pull-up resistor value combined with the input capacitance of the IN pin and stray wiring capacitance limits the switching speed. Using a lower value of pull-up resistor (like 10k) will give faster switching, at the cost of a little more supply current. As would using a comparator with push-pull output instead of an open collector or open drain output.

    Using 220 uF (electrolytic) caps as local supply buffering is okay, but you also need some bypass caps (typically 0.1uF ceramic) close to the supply pins of the op amps ICs. The larger (electrolytic) capacitors have real-world characteristics due to their construction that limits their performance at higher frequencies.

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  • Richard Caldwell

    This getting way over my head, so I will explain a little more.

     

    This an analog node that mounts on the main board. There will be at lest 6 nodes, with V1 OUT connected to the next node V1 IN pin. Meaning the first node V1 OUT is routed to the V1 IN of the second node. Second node V1 OUT is routed to the third node V1 IN, so on.

     

    This main board will have the spit rail power supply and the V2 ref regulator. I will be using a transformer to drop the voltage from line voltage (120VAC) to 36VAC with a center tap (GND). Then run it through a full bridge rectifier. Then I will use a LM7815 to provide the VCC (15V ) rail, and a LM7915 to provide the VEE (-15) rail. The V2 ref regulator will be power by the VCC rail and is a constant voltage that is set by a pot.

     

    This main board will also condition the input signal, before routing to the first analog node. This input signal can be a audio or a constraint voltage signal. I wanted to be able to do a 5MHZ signal but that will take a lot of work. So this circuit will only have to handle audio frequency ( 15KHZ ) input signal. As for the voltage input signal, which can range from 0V to 8V. 

     

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  • Brad Levy

    Here is a chip that will give you 10 nodes in a single 28 lead SSOP package:
    https://www.analog.com/media/en/technical-documentation/data-sheets/AD9200.pdf
    (It does need a clock signal, easily provided by an oscillator module, and you will still need signal conditioning/scaling on the input signal. But it can operate on a single +5 V supply, and handle signals up to 5 MHz. And requires a lot less wiring. Priced under a dollar per node. ;-) )

     

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  • Richard Caldwell

    What is making you think I am trying to make A/D circuit and why would I want to reinvent the wheel?

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  • Brad Levy

    I'm not saying you set out to design an A/D circuit. But I recognized that your nodes happen to be doing the exact same thing as stages of one method of A/D conversion do. So why not take advantage of a chip that integrates multiple nodes in a nice compact package? Where many of the peskier details of high speed analog design are taken care of for you? You asked me for chip recommendations. This chip (or a similar one) is the way I'd go if my goal was hardware to solve the problem while minimizing cost and maximizing performance.

    If you were trying to make an A/D circuit to learn more about them, or to have one where you or others could look at the internal stages, and learn more about analog design, there'd be nothing wrong with that, either. One can learn a lot from going through all the steps of making one's own version of something.

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  • Brad Levy

    By the way, for signals in this frequency range, if I needed 6 or more chained nodes of a function that didn't happen to be the same as the internal stage of an A/D converter, I'd probably still use an A/D converter, but couple it with a microcontroller or dsp to determine what the outputs should be using a lookup table (or tables) and/or program logic. And I say that because it of the challenges of offset and gain errors that cascade with multiple stages of analog circuits.  The tradeoff would be different for few stages of simpler functions, and/or very high frequencies.

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  • Richard Caldwell

    First my last post came out a little harsh and wish to apologize you have help me out a lot.:)

     

    This design is not ACD but I can see how it looks it. Your chip introduced me to a new form of ADC with pipe line conversion. I really like it a lot and will use it in my next circuit that needs ADC. Thank you for the heads up.

     

    Have a great.

     

     

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  • Brad Levy

    Below you'll find a table I generated with a spreadsheet, showing the results of the six cascaded nodes. The green columns indicate the comparator output for each node (which drives the LOAD line/LED for that node). Column shows the input voltage expressed in 16ths of a volt, converted to a 6 bit binary number using the spreadsheets DEC2BIN function. Notice it exactly matches the 1s and 0s of the 6 green LOAD columns from your circuit intention.

    V1_out of the last node corresponds to the fraction of a bit left over after expressing V1 as an integer number of 1/16V bits (scaled to 4V = 1 full bit remainder).

    Hence, intentionally or not, the function you are implementing is equivalent to an A/D conversion.

    (Another brief comment re: pipelined A/D converters. The AD9200 I posted a link to actual implements it as 5 2-bit stages, so the internal block diagram in the datasheet looks a little different than one using 10 1-bit stages like yours. (You can think of your comparator as a 1-bit A/D converter stage.) Some pipeline converters are implemented as 2 5-bit stages.)

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  • Richard Caldwell

    ( extreme blushing face) Your right it looks like ADC. I do not know I didn't see that before I started this project.

     

    Thank you for pointing this out to me and I will drop this project.

     

    I will use an ADC with pipeline conversion.  The chip you refer to is at the End of Life: Scheduled for obsolescence and will be discontinued by the manufacturer (according to mouser.com my main supplier). So I will do a web search for a different chip that will replace that chip.

     

    Again ( with a blushing red face) thank you for correcting my thinking. One good thing that did come from all this is I learned a lot about op-amps.

     

    Richard

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